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- 1
-
W. Mendenhall, L. Ott, and R. L. Scheaffer.
Elementary Survey Sampling.
Wadsworth Publishing Company Inc, Belmont, California, 1991.
- 2
-
G. A. Allan and A. J. Walton.
Yield prediction for ULSI.
In VLSI Multilevel Metal Interconnection Conference, pages
207-212, Santa Clara,CA, June 1996.
- 3
-
B. T. Murphy.
Cost-size optima of monolithic integrated circuits.
Proc. IEEE., 52:1537-1545, Dec 1964.
- 4
-
R. B. Seeds.
Yield, economic, and logistic models for complex digital arrays.
IEEE International Convention Record, pages 60-61, Mar 1967.
- 5
-
J. E. Price.
A new look at yield of integrated circuits.
Proc. IEEE(Letters), 58(8):1290-1291, Aug 1970.
- 6
-
C. H. Stapper.
Modeling of integrated circuit defect sensitivities.
IBM J. Res. Develop., 27(6):549-557, Nov 1983.
- 7
-
S. Levasseur and F. Duvivier.
Application of a yield model merging critical areas and defectivity
data to industrial products.
In IEEE International Symposium on Defect and Fault Tolerance in
VLSI Systems, pages 11-19, Paris, France, Oct 1997.
- 8
-
S. Barberan and F. Duvivier.
Management of critical areas and defective data for yield trend
modeling.
In IEEE International Symposium on Defect and Fault Tolerance in
VLSI Systems, pages 17-25, Austin, Texas, Nov 1998.
Gerard A Allan
2002-11-18